Fully self-developed processing-in-memory innovative IP

-N300

Fully self-developed processing-in-memory innovative IP

Pimchip provides dedicated acceleration cores for machine learning and artificial intelligence, specially optimized for the large number of neural network models involved in AI computing. It can process machine learning algorithms and deep learning models such as artificial neural networks with higher efficiency and lower energy consumption, facilitating the implementation of AI in multiple scenarios.

-N300

Function Points

  • Computility

    The N300 provides computility of 0.5 TOPS in single-core and a Cluster architecture composed of multiple NPU cores.

  • Accuracy

    The N300 supports mixed-precision computing, including integer computation at 4-bit, 8-bit, and floating-point computation at 16-bit, which enables a better balance between energy consumption, computility density, and computation accuracy.

  • Flexibility

    The high-speed task scheduling acceleration unit supports real-time task scheduling for multi-core or multiple computing units.

  • Compatibility

    The N300 supports custom operators to meet the deployment needs of various models, and provides configuration schemes and specific optimizations for application scenarios such as voice activity detection, eye-tracking, active noise control, and environmental perception.

  • Software and toolchains

    To meet customers' needs for more autonomous and flexible algorithm migration, the N300 have opened up NPU intermediate representation layer specifications, model parsers, model optimizers, drivers, etc., and provided a free software toolchain, including software simulators, debuggers, and C compilers.

  • Supported Networks

    MobileNet, ResNet, Yolo-v2/v3, UNet, ShuffleNet, SqueezeNet, EfficientNet, LSTM, and networks that can be decomposed into combinations of the above operators.

-N300

NPU Supports Operators

Operator name

Parameter

Conv

Kernel size: Any shape <=7x7

Stride: 1,2,3

Zero padding: 0~kernel size-1

Depthwise

Kernel size:Any shape <=5x5

Stride: 1,2,3

Zero padding: 0~kernel size-1

Transposed convolution

Kernel size: Any shape <=7x7

Stride: 1,2,3

Zero padding: kernel size-1

FC

Channel size: 1~2048

Pooling

Kernel size:1~15

Type: max, avg, min

Concat

Only supports channel direction

Binary operator

Arithmetic operation:add,sub, mul, div, mod, avg

Logical operation:or,and

Comparison operation:min,max,cmp,logic,sel,compsel

Unary operator

Log,exp,abs,not,sqrt,tanh

Reorg

HWC<->CHW

Upsampling

Nearest interpolation, Bilinear interpolation

Nonlinear

Relu,p-relu,leaky-relu,relu6,softmax

Supported networks:

MobileNet, ResNet, Yolo-v2/v3, UNet, ShuffleNet, SqueezeNet, EfficientNet, LSTM, and networks that can be decomposed into combinations of the above operators.

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